IC Verification Engineer

Since its spin-off in September 2025 AUMOVIO continues the business of the former Continental group sector Automotive as an independent company. The technology and electronics company offers a wide-ranging portfolio that makes mobility safe, exciting, connected, and autonomous. This includes sensor solutions, displays, braking and comfort systems, as well as comprehensive expertise in software, architecture platforms, and assistance systems for software-defined vehicles. In the fiscal year 2024, the business areas, which now belong to AUMOVIO, generated sales of 19.6 billion euro. The company is headquartered in Frankfurt, Germany, and has about 87,000 employees in more than 100 locations worldwide. Detailed task descriptionExperience: 6 - 12 YearsCollect, discuss, and evaluate requirements related to IC test & validation concept(s) in cooperation with other disciplines' developersActively support system and/or IC concept and architecture definition, considering feasibility with semiconductor technologies and test strategyApply new validation concepts to the design verification.Define requirements of the IC validation together in cooperation with other disciplines' developersSpecify IC validation characteristics and interfaces within component specification documentResponsible for the technical communication with the ASIC supplier during the whole ASIC developmentJudge and approve simulation/design results in consideration of defined system requirementsDecide on optimal IC verification concept based on simulation results and worst-case calculationsEvaluate technical and development risks for IC development together with ASIC PMPlan time schedule for dedicated ASIC project tasks, track validation progress, perform bench testsCreate and maintain development documentsApply configuration and change management, apply quality assurance managementFrom circuits specifications, ASIC verification engineer should specify verification strategies and testbench architectures (SystemVerilog, UVM, C-driven, others) to ensure optimum verification coveragesElaborate detailed verification plans corresponding to circuit specificationsDevelop verification environments and tests/sequences according to verification plansResponsible of the definition of the verification strategies, of their implementation and of the verification qualityImprove the verification flowHe is responsible for carrying out all assigned tasks with a focus on function, quality, test architecture, test coverage, schedule, and delivery of verification in time.Together with other disciplines' developers, the verification engineer is defining integration concepts, specifying the IC test requirements, defining related test architecture, and verifying implemented functions. The is taking care about process implementation and scheduleIC (ASIC) Verification The engineer is responsible for developing functional models for Analog and/or Digital IPs. Developing Digital and analog/mixed-signal test be...

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