Staff Verification Engineer- LoRa
Responsibilities
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Define and implement test plans and verification strategies based on design specifications and requirements (20%).
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Develop assertion-based checkers and functional coverage models aligned to verification plans (20%).
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Perform functional verification of RTL designs using industry-standard methodologies (e.g. UVM) (20%).
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Generate and analyse coverage reports to ensure verification of completeness and quality (20%).
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Collaborate with design and architecture teams to understand system requirements and ensure alignment (10%).
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Identify, debug, and resolve verification issues and design bugs (10%).
Minimum Qualifications
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Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
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8+ years of experience in SoC verification.
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Strong hands-on experience with UVM-based verification methodologies.
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Proven experience in defining and executing test and verification plans.
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Experience with coverage-driven verification and coverage analysis.
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Proficiency in SystemVerilog and assertion-based verification.
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Familiarity with industry-standard verification tools (e.g. VCS, QuestaSim).
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Experience with IC design verification at block and SoC level.
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Knowledge of formal verification techniques.
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Experience verifying bus architectures (e.g. AMBA AHB/AXI, NoC, Bus Fabric) in UVM environments.
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Understanding of low-power verification methodologies.
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Strong analytical, debugging, and problem-solving skills.
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Excellent communication and teamwork abilities.
Desired Qualifications
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Strong programming skills in Python.
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Experience in wireless SoC design and verification.
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Knowledge of scripting languages (e.g. Tcl, Python, Perl) for automation.
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Familiarity with version control systems (e.g. Git).